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Technical Reference Guide www.hp.com 3-1

Processor/Memory Subsystem

3.1 Introduction

This chapter describes the processor/memory subsystem. These systems support the Intel

Pentium and Core processor families and use the Q35 chipset (Figure 3-1). These systems

support PC2-6400 and PC2-5300 DDR2 memory modules.

Figure 3-1. Processor/Memory Subsystem Architecture

This chapter includes the following topics:

■ Intel Pentium processor (3.2)

■ Memory subsystem (3.3)

Processor

Q35

GMCH

Cntrl

SDRAM

XMM1

Channel A

DIMM

XMM3

XMM4 [1]

XMM2 [1]

FSB I/F

Note:

[1] Not present on USDT form factor.

Intel

Channel B

SODIMM

1 2 ... 28 29 30 31 32 33 34 35 36 37 38 ... 101 102

Technical Reference Guide 1
First Edition (October 2007) 2
Contents 3
3 Processor/Memory Subsystem 4
4 System Support 4
5 Input/Output Interfaces 4
8SYSTEM BIOS 6
A Error Messages and Codes 6
Introduction 7
1.5 Notational Conventions 9
Table 1-1 10
Table 1-1 (Continued) 11
System Overview 17
2.2 Features 18
Table 2-1 19
2.3 System Architecture 20
2.3.1 Intel Processor Support 22
2.3.2 Chipset 23
2.3.3 Support Components 24
2.3.4 System Memory 24
2.3.5 Mass Storage 25
2.3.9 Graphics Subsystem 26
2.3.10 Audio Subsystem 26
2.4 Specifications 27
Table 2-8 28
Physical Specifications 28
Table 2-9 29
Table 2-10 30
Optical Drive Specifications 30
Table 2-11 31
Hard Drive Specifications 31
Processor/Memory Subsystem 33
3.2 Intel Processors 34
3.3 Memory Subsystem 36
3.3.1 Memory Upgrading 37
System Support 39
Software/Driver Layer 41
Transaction Protocol Layer 41
4.2.3 Option ROM Mapping 42
4.2.4 PCI Interrupts 42
4.2.6 PCI Connectors 43
PCI Express Connectors 44
4.3 System Resources 45
4.3.2 Direct Memory Access 46
4.4.1 Clearing CMOS 47
4.5 System Management 48
Power-On / Setup Password 49
Setup Password 49
Cable Lock Provision 49
I/O Interface Security 49
Chassis Security 49
4.5.2 Power Management 50
4.5.3 System Status 51
4.6.1 System I/O Map 52
4.6.2 GPIO Functions 53
I/O Controller Functions 54
Input/Output Interfaces 55
5.2 SATA Interface 56
5.3 PATA Interface 57
5.4 Diskette Drive Interface 58
Table 5-3 59
5.5 Serial Interface 60
5.6 Parallel Interface 61
Table 5-5 62
Table 5-6 64
5.8.1 USB Connector 65
5.8.2 USB Cable Data 66
5.9 Audio Subsystem 67
5.9.1 HD Audio Controller 68
5.9.2 HD Audio Link Bus 68
5.9.3 Audio Multistreaming 68
5.9.4 Audio Specifications 69
5.10.1 Wake-On-LAN Support 71
5.10.4 NIC Connector 72
5.10.5 NIC Specifications 72
Integrated Graphics Subsystem 73
6.2 Functional Description 74
Controller 74
6.3 Display Modes 76
6.4 Upgrading 77
6.5 Monitor Connectors 78
Table 6-4 79
Power and Signal Distribution 81
7.2.2 SFF Power Distribution 82
Table 7-2 83
7.2.3 CMT Power Distribution 84
7.2.4 Energy Star Compliancy 85
7.3 Power Con trol 86
Table 7-5 87
Power Button Actions 87
Power LED Condition 87
7.3.2 Wake Up Events 88
7.3.3 Power Management 89
7.4 Signal Distribution 90
Table 7-7. (Continued) 91
SYSTEM BIOS 93
8.2 ROM Flashing 94
8.3 Boot Functions 95
8.3.4 Boot Error Codes 96
Table 8-2 97
8.4.1 System ID and ROM Type 98
8.4.2 Temperature Status 98
8.4.3 Drive Fault Prediction 98
8.5 SMBIOS 99
8.6 USB Legacy Support 100

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