HP Integrity rx2600 Especificações descarregar pdf (Página 22)

These servers have high-availability power supplies, too. The rx5670, rx4640, and rx2600 power subsystems

provide high availability with N+1 redundant power options. The rx5670 comes standard with two hot-swap

power supplies, and an optional third supply can be ordered for 2+1 redundancy. The rx4640 and rx2600 each

come standard with a single hot-swap power supply; and an optional second supply gives these servers 1+1

redundancy of power supplies. To further enhance availability, each power supply has its own dedicated power

feed or line cord. Cords can be plugged into separate power grids for the maximum level of power protection.

Hot-plug disk drives

The rx5670 supports up to four SCSI disks, the rx4640 supports up to two, and the rx2600 supports up to three.

All disks are accessible from the front of the system and can be removed (or hot-plugged) while the server

continues to run.

Two dual-channel SCSI controllers manage the four internal hot-plug disks in the rx5670. For added availability,

disk pairs are on separate channels as well as separate SCSI controllers. This means that with disk mirroring, a

SCSI controller, SCSI channel, or root disk could fail and the server would continue to run properly.

A dual-channel SCSI controller manages the pair of disks in the rx4640. The disks can be configured either on a

single SCSI channel or one disk on each of the two channels with disk mirroring for added availability. When

only one SCSI channel is used for the disks, the second can be connected to an external device such as a tape

drive.

A single dual-channel SCSI controller manages the three disks in the rx2600. One channel links to two internal

disks; the second channel is connected to the third internal disk. This allows disk mirroring across separate SCSI

channels, further enhancing availability.

Multiple I/O channels

The multiple zx1 I/O channels in the rx5670, rx4640, and rx2600 provide failover, load balancing, and failure

isolation. In these servers, failures on one channel do not disrupt activities on other channels. Furthermore, both

servers deploy fully independent PCI-X buses to isolate traffic on I/O adapters. If a problem occurs on one

adapter, it will not interfere with traffic on another bus.

ECC and chip spare memory

The memory systems for the HP Integrity rx5670, rx4640, and rx2600 servers utilize error-correcting code to

correct single-bit errors as well as HP’s chip spare technology to protect against multi-bit errors.

Chip spare enables an entire SDRAM chip on a DIMM to be bypassed in the event that a multi-bit error is

detected on that SDRAM. In order to use the chip spare functionality, identical-sized DIMMs must be loaded

in quads. Different DIMM sizes are supported, as long as they are in different quads. For example, a quad of

512 MB DIMMs can be loaded along with a second quad of 1 GB DIMMs, and chip spare will be enabled on

all the DIMMs.

Because of the chip spare feature, the rx5670, the rx4640, and the rx2600 servers are completely resilient to all

SDRAM failures, regardless of the number of bits involved in the fault condition. This virtually eliminates memory

failures as a source of system errors.

Some other vendors deal with multi-bit SDRAM failures by accepting the fact that they will occur. That is, they use

a scheme that supports only failure detection, not failure correction. HP believes that this is unacceptable and a

dangerous choice for servers in business-critical environments. In fact, server systems that employ failure detection

but not correction are at high risk to fail due to memory problems.

CPU error correction and dynamic processor resiliency

In the HP Integrity rx2600, rx4640, and rx5670 servers, L1 and L2 caches both have full single-bit error checking

and correcting as well as double-bit error detection. Additionally, all the instruction and data paths also have

single-bit error-checking and -correcting capabilities. What’s more, the system processor bus has parity detection,

and the data path is covered by error correction.

The rx2600, rx4640, and rx5670 employ dynamic processor resiliency (DPR), too. With DPR, any CPU

generating correctable cache errors at a rate deemed unacceptable is de-allocated from use by the system. This

feature helps protect against a CPU degrading to the point where it may cause system crashes.

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