
HP C8000
4.24 HP C8000
4.24.1 Overview
The c8000 is the latest and probably last PA-RISC HP workstation. It is driven by one or two dual-
core PA-8800 Mako processors, later offered with PA-8900 CPUs and features an impressive array of
system and I/O options. The center of the system is the HP zx1 chipset, which also supports Itanium
processors. The system is built in a sleek, silent tower casing and also available as a rack-mount option.
Time of introduction: 2004
4.24.2 Internals
CPU
1-2 PA-8800 (dual-core) 900MHz-1.0GHz with 1.5MB/1.5MB on-chip I/D L1 cache and 32MB
off-chip L2 cache each
or
1-2 PA-8900 (dual-core) 800MHz-1.1GHz with 1.5MB/1.5MB on-chip I/D L1 cache and 64MB
off-chip L2 cache each
Chipset
HP zx1 chipset
– zx1 MIO (memory and I/O controller) connects to the processor bus (6.4GB/s), two mem-
ory buses (each 4.25GB/s) and seven I/O channels (aggregate 3.5GB/s) and contains both
memory and cache controllers
– Six zx1 IOAs (I/O adapters) connect the PCI-X slots and I/O devices to the zx1 MIO with
an aggregate bandwidth of 3.5GB/s on seven 0.5GB/s channels
1. AGP 4x graphics bus on two channels — 1.0GB/s
2. PCI-X 64/133 I/O slot on one channel — 0.5GB/s
3. PCI-X 64/133 I/O slot on one channel — 0.5GB/s
4. PCI-X 64/133 I/O slot on one channel — 0.5GB/s
5. Gigabit Ethernet and Ultra320 SCSI on PCI 64/66 on one channel — 0.5GB/s
6. IDE, USB, management LAN on PCI 32/33 on one channel — 0.5GB/s
Gitabit Ethernet controller
Two-channel Ultra-320 SCSI controller
UltraATA-133 IDE controller
8MB Flash EEPROM
The detailed layout of the zx1 chipset and I/O adapters (IOAs) is approximate — no system-level de-
scriptions were found and the information inferred from bus layout.
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