
HP Integrity rx2600 & rx2620 Internals
1. PCI-X 64/133 I/O slot on two channels — 1.0GB/s
2. PCI-X 64/133 I/O slot on one channel — 0.5GB/s
3. PCI-X 64/133 I/O slot on one channel — 0.5GB/s
4. PCI-X 64/133 I/O slot on one channel — 0.5GB/s
5. Core I/O: IDE, USB, serial, (rx2600 only: Fast-Ethernet LAN) in a PCI 64/133 slot on one
channel — 0.5GB/s
6. Core I/O: Gigabit Ethernet and Ultra320 SCSI (on rx2620 there are each two Gigabit Eth-
ernet and SCSI controllers) in a PCI 64/133 slot on one channel — 0.5GB/s
7. Management: Ethernet LAN, VGA, serial in a PCI 64/133 slot on one channel — 0.5GB/s
The “I/O connectivity” part of the chipset is made up of standard third-party I/O chips:
Gigabit Ethernet (Broadcom 5701)
Two-channel Ultra320 SCSI controller (LSI 53C1030)
Ultra ATA-100 IDE controller (PCI649)
Serial controller, DUART (16550A-compatible)
10/100 Ethernet for management (Intel 82550)
Management processor card included by default ( “ECI card” ) — includes serial/ remote manage-
ment and VGA
Radeon VGA graphics
EHCI USB controller
Processor Dependent Hardware (PDH) Controller
FPGA controller for ACPI (2.0) and LPC
Baseboard Management Controller for IPMI management interface (the BMC is a ARM7 RISC
processor)
Buses
Itanium 2/zx1 processor bus 6.4GB/s at 200MHz DDR
Two independent zx1 memory buses, 266MHz, each 4.25GB/s — aggregate 8.5GB/s memory
bandwidth
Eight zx1 I/O channels/buses, aggregate 4.0GB/s
Four PCI-X 64/133 I/O buses for expansion cards
Three PCI-X 64/133 I/O buses for Core I/O cards (SCSI, networking, etc.)
Two SCSI-3 Ultra320 (LVD) storage I/O buses
UltraATA-100 IDE storage I/O bus
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