
PA-RISC CPU Architecture Further reading
Notes
1. Single Instruction Multiple Data, Multiple Instruction Multiple Data (MIMD), see for example the SIMD Wikipedia
article
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and MIMD Wikipedia article
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MAX-2 (64-bit)
With the introduction of the new 64-bit PA-RISC 2.0 architecture in 1996 HP unveiled a new set of
multimedia-oriented instructions aimed at using the processor’s resources more effectively for sub-word
data. The basic components of the contemporary multimedia data were often represented as 8, 12 or
16-bit integers, for example audio sampling and pixel color depth. Doing arithmetic with data of this
length would waste an considerable amount of the processor’s execution capacities, a simple addition
of 16-bit data would only use one quarter of the 64-bit wide integer units datapath. To remedy this
situation, MAX allows for packing of these subword data into larger words near the processor’s natural
word width (64-bit on PA-RISC 2.0 processors) and using parallel instructions on them. An example
would be four 16-bit additions by the 64-bit adder on four 16-bit packed subwords.
The basic functionality from the earlier 32-bit MAX-1 was taken over and four more instructions added
for MAX-2. Additionally, due to the wider integer registers (now 64-bit) more subwords can be packed
in one cycle, doubling the effective speed of these multimedia instructions. The MAX-2 multimedia
instructions include (new in MAX-2 are in bold): parallel add, parallel subtract, parallel shift left &
add (i.e. multiply with integer), parallel shift right & add (i.e. division), parallel average, parallel shift
right, parallel shift left, mix and permute.
MAX-2 debuted 1996 with the PA-8000 processor and later featured on all subsequent PA-RISC 2.0
processors (PA-8x00). In contrast to contemporary multimedia extensions, MAX-2 required only very
little die space (0.1 percent on the PA-8000).
References
Accelerating Multimedia with Enhanced Microprocessor
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(PDF, 2.4MB) Discussion of the MAX-
1 instructions. Ruby Lee, April 1995, IEEE Micro, Volume 15 Number 2.
64-bit and Multimedia Extensions in the PA-RISC 2.0 Architecture
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(PDF, 66KB) New features
of the 64-bit PA-RISC 2.0 architecture and overview on the MAX introduced with it. Ruby Lee
and Jerry Huck, 1996, Hewlett-Packard Company.
Subword Parallelism with MAX-2
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(PDF, 1.5MB) Discussion of the MAX-2 instructions. Ruby
Lee, August 1996, IEEE Micro, Volume 16 Number 4.
2.3.7 Further reading
Selected papers and articles for further reading on the PA-RISC architecture and platform
Hewlett-Packard Precision Architecture: The Processor
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(.pdf) M. Mahon et al (August 1986:
Hewlett Packard Journal. Accessed May 2009)
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http://en.wikipedia.org/wiki/SIMD
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http://en.wikipedia.org/wiki/MIMD
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http://www.ee.princeton.edu/~rblee/HPpapers/accelMultimediawEnhancedMicroproc.pdf
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http://ftp.parisc-linux.org/docs/whitepapers/pa2c96.pdf
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http://homepages.cae.wisc.edu/~ece734/mmx/00526925.pdf
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http://www.hpl.hp.com/hpjournal/pdfs/IssuePDFs/1986-08.pdf
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