HP B160L Manual do Utilizador descarregar pdf (Página 351)

HP 9000/500 FOCUS Architecture

 Introduced 1984

 One CPU (up to three supported)

 512KB RAM (10MB maximum)

 Up two four Display Station Buffer Cards (DSBs) [graphics adapters]

 One IOP (up to two supported)

 HP-IB interface ( “medium-speed” )

 9050A: base system (probably equals 9050)

 9050AT (bundled system): 9050A with 1.5MB RAM, HP-UX operating system (single-user)

 9050AM (bundled system): 9050A with 1.5MB RAM, HP-UX operating system (multi-user)

HP 9000/500s in SMP conﬁguration were confusingly also called 600 series (some of the 1980s’ 800s

server systems were also called 600 series for a short time).

Possible I/O and expansion options (for all 500s):

 HP-IB card for external HP-IB (HP Instrumentation Bus) devices

 GP-IO card for GP-IO (General Purpose I/O) devices with 8-bit or 16-bit DMA

 Asynchronous Serial

 I/O Expander for eight I/O channels/slots (CIO) for additional IOPs

 LAN 9000, 10Mbit Ethernet (coax)

4.54.4 Architecture

The FOCUS is a stack architecture, with 230 instructions (both 32 bits and 16 bits wide), a segmented

memory model, and no general purpose programmer-visible registers. There are thirty-nine 32-bit

registers in the CPU hardware — thirty-one internal 32-bit general purpose registers, two 32-bit ALU

registers, and others.

It has a ﬂat address space but that is not really what most programs see: their access to memory is

largely described by registers that contain the absolute memory addresses of segment boundaries. For

example, instructions come from the current code segment, which is described by three registers: P,

the program counter, which is a 32-bit register containing the absolute address of the instruction being

executed; PB, the program base register, which is a 32-bit register containing the absolute address of

the ﬁrst word of the current code segment; and PL, the program limit register, which is a 32-bit register

containing the absolute address of the last word of the current code segment.

The data segment also has base (DB) and limit (DL) registers, and so does the stack segment (SB, SL).

The stack segment also has a stack pointer (S) and a stack marker pointer (Q) which points to the

current procedure’s activation record on the stack.

There is also an index register, a status register, a ﬂags register (really a sort of debugging-state reg-

ister), a message register (interrupting conditions) and message mask register (which enables/disables

interrupts from the message register), a breakpoint register, and a couple of registers which are for the

memory controllers to talk to the CPU.

The machine instruction set is oriented toward moving words between memory and the top of the

stack, and operating on the words at the top of the stack. To take an addition of two numbers: load

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HP B160L Manual do Utilizador Página 351