
HP Visualize J200, J210, J280 & J2240 Internals
J2240: 1-2 PA-8200 236MHz with 2/2MB external I/D L1 cache
The 2KB on-chip “assist” cache is not really a true cache.
Chipset
LASI ASIC, which features:
– NCR 53C710 8-bit single-ended SCSI-2
– Intel 82596CA 10Mb Ethernet controller
– WD 16C522 compatible parallel
– Harmony CD/DAT quality 16-bit stereo audio
– NS 16550A compatible serial
PA-7200-models: U2 I/O adapter Runway to GSC bridge
PA-8000/PA-8200-models: UTurn I/O adapter Runway to GSC bridge
MMC/SMC memory controllers
Wax chip
– EISA bus converter (GSC-to-EISA)
– Second RS232 serial
– HP HIL interface
Intel 82C503 Ethernet transceiver, media auto-selection
CS4215 or AD1849 programmable CODECs
NCR 53C720 16-bit Fast-Wide high-voltage differential (HVD) SCSI-2
J2240: Dino GSC-to-PCI bridge
J2240: Cujo GSC-to-PCI bridge
J2240: Symbios Logic 53C895 16-bit Ultra-Wide SCSI-2 controller
J2240: DEC 21142/43 (Tulip) Fast-Ethernet controller
Buses
Runway CPU/memory bus (100MHz with 800MB/s peak data rate on J200, 120MHz 960MB/s
on all others)
GSC system level I/O bus
EISA additional expansion I/O bus
SCSI-2 Fast-Wide high-voltage differential bus; main storage I/O
SCSI-2 Fast-Narrow single-ended bus
J2240: SCSI-3 Ultra-Wide single-ended bus; main storage I/O
J2240: PCI bus;
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